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this is preliminary information on a new product now in dev elopment or undergoing evaluati on. details are subject to change without notice. december 2014 docid025569 rev 3 1/32 SPV1050 ultralow power energy harv ester and battery charger datasheet - preliminary data features ? transformerless thermoelectric generators and pv modules energy harvester ? high efficiency for any harvesting source ? up to 70 ma maximum battery charging current ? fully integrated buck-boost dc-dc converter ? programmable mppt by external resistors ? 2.6 v to 5.3 v trimmable battery charge voltage level ( 1% accuracy) ? 2.2 v to 3.6 v trimmable battery discharge voltage level ( 1% accuracy) ? two fully independent ldos (1.8 v and 3.3 v output) ? enable/disable ldo control pins ? battery disconnect function for battery protection ? battery connected and ongoing charge logic open drain indication pins applications ? charge any battery chemistry, including lithium based, solid state thin film and super-capacitor. ? wsn, hvac, building and home automation, industrial control, remo te metering, lighting, security, surveillance. ? healthcare and biomedic al sensors, fitness. description the SPV1050 is an ultralow power and high- efficiency energy harvester and battery charger, which implements the mppt function and integrates the switching elements of a buck-boost converter. the SPV1050 device allows the charge of any battery, including the thin film batteries, by tightly monitoring the end-of-charge and the minimum battery voltage in order to avoid the overdischarge and to preserve the battery life. the power manager is suitable for both pv cells and teg harvesting sources, as it covers the input voltage range from 75 mv up to 18 v and guarantees high efficiency in both buck-boost and boost configuration. furthermore the SPV1050 device shows very high flexibility thanks also to the trimming capability of the end-of-charg e and undervoltage protection voltages. in such way any source and battery is matched. the mppt is programmable by a resistor input divider and allows maximizing the source power under any temperature and irradiance condition. an unregulated voltage output is available (e.g. to supply a microcontroller), while two fully independent ldos are embedded for powering sensors and rf transceiver s. both ldos (1.8 v and 3.3 v) can be independently enabled through two dedicated pins. vfqfpn 3 x 3 x 1 mm 20l wlcsp20 www.st.com
contents SPV1050 2/32 docid025569 rev 3 contents 1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 electrical characteristi cs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.1 battery charger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.2 boost configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.3 buck-boost configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.4 mppt setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.5 power manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 8 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
docid025569 rev 3 3/32 SPV1050 list of tables 32 list of tables table 1. pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 2. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 4. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 5. vfqfpn20 3 x 3 x 1 mm - 20-lead pitch 0.4 packa ge mechanical data . . . . . . . . . . . . . . 28 table 6. wlcsp20, die pads coordinates and pads size. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 7. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 table 8. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
list of figures SPV1050 4/32 docid025569 rev 3 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. pin configuration (top through vi ew) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. battery management section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 4. boost configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 5. boost startup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 6. mppt tracking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 7. triggering of v eoc (batt pin floating) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 8. efficiency vs. input current - v oc = 1.0 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 9. efficiency vs. input current - v oc = 1.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 10. efficiency vs. input current - v oc = 2.0 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 11. efficiency vs. input current - v oc = 2.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 12. buck-boost configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 13. buck-boost startup (i in = 5 a) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 14. mppt tracking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 15. efficiency vs. input current - v oc = 6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 16. efficiency vs. input current - v oc = 9 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 17. efficiency vs. input current - v oc = 12 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 18. efficiency vs. input current - v oc = 15 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 19. mppt setup circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 20. energy harvester equivalent circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 21. voltage vs. time at different c values and fixed current . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 22. ldo1 turn on with 100 ma load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 23. ldo2 turn on with 100 ma load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 24. vfqfpn20 3 x 3 x 1 mm - 20-lead pitch 0.4 pa ckage outline(1) . . . . . . . . . . . . . . . . . . . . 27 figure 25. wlcsp20, die and pads position (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
docid025569 rev 3 5/32 SPV1050 block diagram 32 1 block diagram figure 1. block diagram 3*1' ,1b/9 /'2b(1 bbbbbbbbbb %$77b&211 bbbbbbbbbb %$77b&+* %$77 6725( ,1b+9 /b+9 033 /'2b(1 0337 &21752/ /2*,& (2& 893 &21) 033b5() 033b6(7 /'2 &21752/ '5,9(56 *1' 9 6725( 9 6725( /'2 9 $0
pin configuration SPV1050 6/32 docid025569 rev 3 2 pin configuration figure 2. pin configurat ion (top through view) vfqfpn 3 x 3 x 1 mm - 20l 6725( %$77 /'2 &21) /'2 033 033b6(7 *1' /'2b(1 033b5() /'2b(1 %$77b&211 893 %$77b&+* (2& ,1b+9 /b+9 3*1' ,1b/9 1& $0 vfqfpn 3 x 3 x 1 mm - 20l
docid025569 rev 3 7/32 SPV1050 pin description 32 3 pin description table 1. pin description pin no. name type description 1mppi max. power point tracking voltage sense pin. to be connected to the voltage source through a ladder resistor. 2 mpp-set i max. power point setting voltage pin. to be connected to the mpp pin through a ladder resistor. connect to store if mpp function is not required. 3 mpp-ref i max. power point reference voltage pin. to be connected to a 10 nf capacitor. connect to an external voltage referenc e if mpp function is not required. 4 gnd gnd signal ground pin. 5 ldo1_en i if high, enables ldo1. 6 ldo2_en i if high, enables ldo2. 7 batt_chg o ongoing battery charge output flag pin (open drain). if low, it indicates that the battery is on charge. if high, it indicates that the battery is not on charge. 8batt_conn o battery status output flag pin (open drain). if high, it indicates that the pass transistor between the store and batt pins is open (battery disconnected). if low, it indicates that the pass transistor between the store and batt pins is closed (battery connected). 9eoci battery end-of-charge pin. to be connected to the store pin through a resistor divider between eoc and gnd. 10 uvp i battery undervoltage protection pin. to be connected to the store pin through a resistor. 11 ldo1 o 1.8 v regulated output voltage pin. 12 ldo2 o 3.3 v regulated output voltage pin. 13 conf i configuration pin. boost configuration: to be connected to the voltage supply source. buck-boost configuration: to be connected to ground. 14 batt i/o battery connection pin. 15 store i/o tank capacitor connection pin. 16 in_lv i low voltage input source. it has to be connected to the inductor fo r both boost and buck-boost configuration. 17 nc - not connected. 18 pgnd pgnd power ground pin.
pin description SPV1050 8/32 docid025569 rev 3 19 l_hv i input pin for buck-boost configuration. boost configuration: to be connected to ground. buck-boost configuration: to be connected to the inductor. 20 in_hv i high voltage input source. boost configuration: to be connected to ground. buck-boost configuration: to be con nected to the voltage supply source. table 1. pin description (continued) pin no. name type description
docid025569 rev 3 9/32 SPV1050 maximum ratings 32 4 maximum ratings table 2. thermal data symbol parameter value unit min. max. r th j-c max. thermal resistance, junction to case tbd c/w r th j-a max. thermal resistance, junction to ambient tbd c/w p tot maximum power dissipation at t amb = 85 c 1 w t j junction temperature range -40 125 c t storage storage temperature 150 c table 3. absolute maximum ratings symbol parameter value unit in_lv analog input v store + 0.3 v in_hv analog input 20 v l_hv analog input in_hv + 0.3 v conf analog input 5.5 v mpp analog input 5.5 v mpp-set analog input 5.5 v mpp-ref analog input 5.5 v batt analog input/output 5.5 v store analog input/output 5.5 v uvp analog input v store + 0.3 v eoc analog input v store + 0.3 v batt_conn digital output 5.5 v batt_chg digital output 5.5 v ldo1_en digital input v store + 0.3 v ldo2_en digital input v store + 0.3 v ldo1 analog output v store + 0.3 v ldo2 analog output v store + 0.3 v pgnd power ground 0 v gnd signal ground -0.3 to 0.3 v
electrical charac teristics SPV1050 10/32 docid025569 rev 3 5 electrical characteristics v store = 4 v, t amb = - 40 to 85 c, unless otherwise sp ecified. voltage with respect to gnd unless otherwise specified. table 4. electrical characteristics symbol parameter test cond ition min. typ. max. unit battery operating range i batt maximum battery charging current 70 ma v batt batt pin voltage range 2.2 5.3 v v battacc battery voltage accuracy -1 +1 % r batt pass transistor resistance 7 ? bandgap v bg internal reference voltage 1.23 v accuracy -1 +1 % uvp v uvp undervoltage protection range (v uvp + uvp hys ) < (v eoc - eoc hys )2.2 3.6 v eoc v eoc battery end-of-charge voltage (v uvp + uvp hys ) < (v eoc -eoc hys )2.6 5.3 v eoc hys eoc hysteresis v store decreasing -1 % static current consumption i sd shutdown current shut down mode: before first star tup or batt_conn high t amb < 60 c 1na i sb standby current standby mode: batt_conn low, batt_chg high and ldo1,2_en low t amb = 25 c 1.0 a i op operating current in open load operating mode (ldos in open load) batt_conn low batt_chg high t amb = 25 c ldo1_en = 1 or ldo2_en = 1 1.9 a ldo1,2_en = 1 2.8
docid025569 rev 3 11/32 SPV1050 electrical characteristics 32 dc-dc converter v in_lv input voltage range boost configuration 0.15 v eoc v v in_hv buck-boost configuration 0.15 18 v in-min minimum input voltage at startup boost configuration batt_conn high or at first startup 0.5 v buck-boost configuration batt_conn high or at first startup 2.6 i b-su startup input current boost configuration 30 a i bb-su buck-boost configuration 5 a r-on b low-side mos resistance boost configuration 1.0 ? sr-on b synchronous rectifier mos resistance 1.0 r-on bb low-side mos resistance buck-boost configuration 1.5 ? sr-on bb synchronous rectifier mos resistance 1.5 f sw switching frequency boost and buck-boost configurations 1 mhz uvlo h undervoltage lockout threshold (v store increasing) boost and buck-boost configurations 2.6 v uvlo l undervoltage lockout threshold (v store decreasing) 2.1 v mppt t tracking mppt tracking period batt_chg low 16 s t sample mppt sampling time batt_chg high 0.4 s v mpp mpp pin voltage range boost and buck-boost configurations 0.075 v uvp v mpp acc mpp tracking accuracy boost and buck-boost configurations 95 % ldo v ldo1,2 ldo1,2 adjusted output voltage ldo1_en = 1 1.8 v ldo2_en = 1 3.3 ? v ldo1,2 ldo1 dropout v ldo1 + 200 mv < v batt ? 5.3 v i ldo1 = 100 ma 0.5 % ldo2 dropout v ldo2 + 200 mv < v batt ? 5.3 v i ldo2 = 100 ma 1.3 t ldo ldo 1,2 startup time batt_dis low c ldo1,2 = 100 nf 1ms v ldo1,2_en_h ldo1,2 enable input high 1 v v ldo1,2_en_l ldo1,2 enable input low 0.5 v table 4. electrical characteristics (continued) symbol parameter test cond ition min. typ. max. unit
electrical charac teristics SPV1050 12/32 docid025569 rev 3 digital output v batt_conn_l v batt_dis low 1 ma sink current 50 mv v batt_chg_l v xbatt_chg low 1 ma sink current 50 mv table 4. electrical characteristics (continued) symbol parameter test cond ition min. typ. max. unit
docid025569 rev 3 13/32 SPV1050 functional description 32 6 functional description the SPV1050 is an ultralow power energy ha rvester with an embedded mppt algorithm, a battery charger and power manager designed for applications up to about 400 mw. the SPV1050 device integrates a dc-dc converter stage that can be configured as boost or buck-boost by tying the conf pin to pv+/ teg+ or to ground respectively as shown in figure 4 and figure 12 on page 19 . if the embedded mppt algorithm is enabled, the device regulates the working point of the dc-dc converter in order to maximize the power extracted from the sour ce by tracking its output voltage. see further details in section 6.2: boost configuration on page 15 and section 6.3: buck-boost configuration on page 19 . the mppt algorithm can be disabled by shorting the mpp-set pin to the store pin, and by providing an external voltage to the mpp-ref pin. the reference voltage on the mpp-ref pin must be < (v store - 200 mv). 6.1 battery charger in order to guarantee th e lifetime and safety of the battery, the spv10 50 device controls an integrated pass transistor between the store and batt pins and implements both the undervoltage (uvp) and the end-of-c harge (eoc) protection thresholds. figure 3. battery management section %dwwhu\ & 6725( bbbbbbbbbb %$77b&21 bbbbbbbbbb %$77b&+* %$77 6725( &21752/ /2*,& (2& 893 *1' 5 5 5 9 3$66 75$16,6725 $0
functional description SPV1050 14/32 docid025569 rev 3 before the first startup the pass transistor is open, so th at the leakage from the battery is lower than 1 na. the pass transistor will be closed once the voltage on the store pin will rise such that the eoc threshold v eoc is triggered. if the battery is full, and until v store > v eoc - eoc hys , the dc-dc converter will stop switching to avoid battery overcharge. on the contrary, in order to av oid the overdischarge of the batt ery, the pass tr ansistor will be opened once the voltage on the store pin will decrease down to uvp threshold v uvp . these functions are simply implemented by the control of two voltage thresholds, v uvp and v eoc , which can be regulated by a resistor pa rtitioning (r4, r5, r6 ) between store, uvp and eoc pins. the scaled voltages on the u vp and eoc pins will be compared with the internal bandgap voltage reference v bg set at 1.23 v. the design rules to setup the r4, r5 and r6 are the following: equation 1 v bg = v uvp ? (r5 + r6) / (r4 + r5 + r6) equation 2 v bg = v eoc ? r6 / (r4 + r5 + r6) in order to minimize the leakage due to the outpu t resistor partitioning it has to be typically: equation 3 10 m ? ?? r4 + r5 + r6 ?? 20 m ? further, the SPV1050 device provides two op en drain digital outputs to an external microcontroller: ? batt_conn this pin is pulled down when the pass transisto r is closed. it will be released once the pass transistor will be opene d (e.g. triggering of v uvp ). if used, this pin must be pulled- up to the store by a 10 m ? (typical) resistor. ? batt_chg this pin is pulled down when the dc-dc conv erter is switching, while it's released when it is not switching, i. e. when the eoc threshold is triggered until the voltage on the store pin drops at v eoc - eoc hys , when the uvlo threshold is triggered or during the t sample of the mppt algorithm. if used, this pin must be pulled-up to the store by a 10 m ? (typical) resistor.
docid025569 rev 3 15/32 SPV1050 functional description 32 6.2 boost configuration figure 4 shows the boost application circuit. figure 4. boost configuration in case of boost configuration, once the ha rvested source is connected, the SPV1050 device will start boosting the voltage on the store pin. in the range of 0 ?? v store < 2.6 v the voltage boost is carried on by an integrated high-efficiency charge pump, while the dc-dc converter stage will remain off. %dwwhu\ &lq & 6725( 72/2$' 72/2$' 3*1' ,1b/9 /'2b(1 bbbbbbbbbb %$77b&21 bbbbbbbbbb %$77b&+* %$77 6725( ,1b+9 /b+9 033 /'2b(1 0337 &21752/ /2*,& (2& 893 &21) 033b5() 033b6(7 /'2 &21752/ '5,9(56 *1' 9 6725( 9 6725( /'2 $0 7khuprhohfwulf jhqhudwru
functional description SPV1050 16/32 docid025569 rev 3 figure 5 shows the behavior of input voltage v in and v store at the startup. figure 5. boost startup in the range 2.6 v ? v store < v eoc the voltage is boosted by the dc-dc converter. in this voltage range the SPV1050 device sets its intern al impedance accordi ng to the integrated mppt algorithm (the mppt m ode is active). the SPV1050 de vice will stop switching for 400 ms (t sample ) every 16 seconds (t tracking ). during the t sample , the input open circuit voltage v oc is sampled by charging the capacitor on the mpp-ref pin. once the t sample is elapsed, the dc-dc converter will star t switching back by setting its own impedance such that v in stays as close as possible to v mpp of the source . a resistor partitioning connected between the source and the pins mpp and mpp-set has to be properly selected, in order to match th e manufacturer's specs. please refer to section 6.4: mppt setting on page 23 for further details. the periodic sampling of v oc guarantees the best mppt in case of source condition variations (e.g. irradiation/thermal gradient and/or temperature changes).
docid025569 rev 3 17/32 SPV1050 functional description 32 figure 6 shows the input voltage waveform of a pv panel supplying v oc = 1.25 v and v mpp = 1.05 v. figure 6. mppt tracking once the v eoc threshold is triggered, the switching of the dc-dc converter is stopped until v store will decrease to v eoc - eoc hys . figure 7. triggering of v eoc (batt pin floating)
functional description SPV1050 18/32 docid025569 rev 3 the following plots from figure 8 to figure 11 show the power efficiency of the dc-dc converter configured in boost mode at t amb = 25 c in some typical use cases at different open circuit voltages: figure 8. efficiency vs. input current - v oc = 1.0 v figure 9. efficiency vs. input current - v oc = 1.5 v (iilflhqf\ 3rxw3lq>@ ,qsxwfxuuhqw>p$@ 9edww 9 9edww 9 9edww 9 $0 (iilflhqf\ 3rxw3lq>@ ,qsxwfxuuhqw>p$@ 9edww 9 9edww 9 9edww 9 $0 figure 10. efficiency vs. input current - v oc = 2.0 v figure 11. efficiency vs. input current - v oc = 2.5 v (iilflhqf\ 3rxw3lq>@ ,qsxwfxuuhqw>p$@ 9edww 9 9edww 9 9edww 9 $0 (iilflhqf\ 3rxw3lq>@ ,qsxwfxuuhqw>p$@ 9edww 9 9edww 9 9edww 9 $0
docid025569 rev 3 19/32 SPV1050 functional description 32 6.3 buck-boost configuration figure 12 shows the buck-boost application circuit. figure 12. buck-boost configuration %dwwhu\ &lq & 6725( 72/2$' 72/2$' 3*1' ,1b/9 /'2b(1 bbbbbbbbbb %$77b&21 bbbbbbbbbb %$77b&+* %$77 6725( ,1b+9 /b+9 033 /'2b(1 0337 &21752/ /2*,& (2& 893 &21) 033b5() 033b6(7 /'2 &21752/ '5,9(56 *1' 9 6725( 9 6725( /'2 $0 6rodu fhoo
functional description SPV1050 20/32 docid025569 rev 3 in case of buck-boost configuration, once th e harvested source is connected, the in_hv and store pins will be inte rnally shorted until v store < 2.6 v. figure 13 shows the behavior of the input voltage v in_hv and v store at the startup. figure 13. buck-boost startup (i in = 5 a) in the range 2.6 v ? v store < v eoc the integrated dc-dc converter will start switching. in this operating range the SPV1050 input impedance is set by the embedded mppt algorithm (the mppt mode is active ). the SPV1050 device will stop switching for 400ms (t sample ) every 16 seconds (t tracking ). during the t sample , the input open circuit voltage v oc is sampled by charging the capacitor on the mpp-ref pin. once the t sample is elapsed, the dc-dc converter will start switching back by setting its own impedance such that v in stays as close as possible to v mpp of the source. a resistor part itioning connected between the source and the pins mpp and mpp-set has to be properly selected in order to match the v mpp given by the source manufacturer. please refer to section 6.4: mppt setting for further details. the periodic sampling of v oc guarantees the best mppt in case of source condition variations (e.g. irradiation and/or temperature changes).
docid025569 rev 3 21/32 SPV1050 functional description 32 figure 14 shows the mppt tracking form in case of v oc = 9.9 v and v mpp = 8.2 v. figure 14. mppt tracking
functional description SPV1050 22/32 docid025569 rev 3 the following plots from figure 15 to figure 18 show the power efficiency of the dc-dc converter configured in buck-boost mode at t amb = 25 c in some typical use cases: figure 15. efficiency vs. input current - v oc = 6 v figure 16. efficiency vs. input current - v oc = 9 v (iilflhqf\ 3rxw3lq>@ ,qsxwfxuuhqw>p$@ 9edww 9 9edww 9 9edww 9 $0 (iilflhqf\ 3rxw3lq>@ ,qsxwfxuuhqw >p$@ 9edww 9 9edww 9 9edww 9 $0 figure 17. efficiency vs. input current - v oc = 12 v figure 18. efficiency vs. input current - v oc = 15 v (iilflhqf\ 3rxw3lq>@ ,qsxwfxuuhqw >p$@ 9edww 9 9edww 9 9edww 9 $0 (iilflhqf\ 3rxw3lq>@ ,qsxwfxuuhqw>p$@ 9edww 9 9edww 9 9edww 9 $0
docid025569 rev 3 23/32 SPV1050 functional description 32 6.4 mppt setting the SPV1050 device sets its working point such that v in = v mpp . in fact v mpp is a fraction of the open circuit voltage v oc of the harvesting source. figure 19. mppt setup circuitry the maximum power point is set through the input resistor partitioning r1, r2 and r3. first of all, set the total input resistan ce (r1 + r2 + r3) considering the maximum acceptable leakage current (i leakage ): equation 4 i leakage = v oc / (r1 + r2 + r3) typically, assuming 10 m ?? r1 + r2 + r3 20 m ? , the leakage on the input resistor partitioning can be considered as negligible. then set the r2 + r3 considering that the vo ltage on the mpp pin must be lower than the minimum v uvp (v uvp(min) = 2.2 v): equation 5 r2 + r3 (r1 + r2 + r3) * v uvp(min) / v oc finally, set the r3 considering the mpp ratio (in case of pv panels mpp ratio = v mp / v oc ): equation 6 mpp ratio = r3 / (r2 + r3) in boost mode if the electrical characteristi cs of the selected source and battery are such that v oc-max ? v uvp(min) , then the resistor r1 can be replaced by a short-circuit. consequently, only r2 and r3 have to be selected for a proper setting of mpp ratio . &lq 3*1' 033 0337 033b5() 033b6(7 *1' 5 5 5 +duyhvwhg vrxufh & 5() $0
functional description SPV1050 24/32 docid025569 rev 3 in a pv panel the v mpp is typically within 70% 80% of v oc . in a teg the v mpp_set is typically about 50% of v oc , so the proper partitioning is: r1 = 0 and r2 = r3. the mppt accuracy can be strongly affect ed by an improper selection of the input capacitor. the input capacitance c in = 4.7 ? f generally covers the mo st typical use cases. the energy extracted from the harvested source , and stored in the input capacitance, is transferred to the load by the dc-dc converter through the inductor. the energy extracted by the inductor depends by the sink current: the higher input currents cause higher voltage drop on the input capacitance and this may result a problem for low voltage (< 1 v) and high energy (> 20 ma) sources. in such application cases the input capacitance has to be increased or, alternatively the l1 inductance has to be reduced. during the t sample time frame the input capacitor c in is charged up to v oc by the source with a t1 time constant resulting from the capacitance and the equivalent resistance r eq of the source. in case of the pv source, assuming i mpp the minimum current at which the mpp must be guaranteed, the req can be calculated as following: equation 7 r eq = (v oc - v mpp ) / i mpp = v oc ? (1 - mpp ratio ) / i mpp thus c in is calculated by the following formula: equation 8 c in ?? t1 /r eq the following plots in figure 20 and figure 21 show the effect of different c in values on the time constant. if the capacitance is too high, the capacitor may not be charged within the t sample = 400 ms time window, thus affecting the mppt accuracy. figure 20. energy harvester equivalent circuit fi gure 21. voltage vs. time at different c values and fixed current & 9 & 5 (4 9 (4 , 033 $09
docid025569 rev 3 25/32 SPV1050 functional description 32 6.5 power manager the SPV1050 device works as a power manager also by providing one unregulated output voltage on the store pin and two regulated voltages on the ldo1 (1.8 v) and ldo2 (3.3 v) pins. each ldo can be selectively enabled or disabl ed by driving the related enable/disable pins ldo1_en and ldo2_en. the performances of the ldos can be optimized by selecting a proper capacitor between the ldo output pin and ground. a 100 nf for each ldo pin is suitable for the most typical use cases. figure 22 and figure 23 show the behavior of the ldos when a 100 ma load is connected. figure 22. ldo1 turn on with 100 ma load
functional description SPV1050 26/32 docid025569 rev 3 figure 23. ldo2 turn on with 100 ma load
docid025569 rev 3 27/32 SPV1050 package information 32 7 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack specifications, grade definitions a nd product status are available at: www.st.com . ecopack is an st trademark. figure 24. vfqfpn20 3 x 3 x 1 mm - 20-lead pitch 0.4 package outline (1) 1. the pin #1 identifier must exist on the top surface of the package by using an indentation mark or an other feature of the package body. exact shape and size of this feature is optional. 9)4)31/ bottom view
package information SPV1050 28/32 docid025569 rev 3 table 5. vfqfpn20 3 x 3 x 1 mm - 20-lead pitch 0.4 package mechanical data symbol dimensions (mm) min. typ. max. note a 0.80 0.90 1.00 (1) 1. ?vfqfpn? stands for ?thermally enhanced ve ry thin fine pitch quad packages no lead?. very thin: 0.80 < a ? 1.00 mm / fine pitch: e < 1.00 mm. a1 0.02 0.05 a2 0.65 1.00 a3 0.20 b 0.15 0.20 0.25 d 2.85 3.00 3.15 d1 1.60 d2 1.50 1.60 1.70 e 2.85 3.00 3.15 e1 1.60 e2 1.50 1.60 1.70 e 0.35 0.40 0.45 l 0.30 0.40 0.50 ddd 0.07
docid025569 rev 3 29/32 SPV1050 package information 32 figure 25. wlcsp20, die and pads position (top view) 0337 0335() 033 *1' /'2b(1 ,1b+9 /'2b(1 /b+9 68% %$77b&+* 3*1' %$77b&211 ,1b/9 (2& 36725( 893 6725( 9%$77 &21) /'2 /'2 $0
package information SPV1050 30/32 docid025569 rev 3 table 6. wlcsp20, die pads coordinates and pads size pad name x position [ ? m] y position[ ? m] pad dimension [ ? m] in_hv -416.55 594.09 81.05 x 81.05 l_hv -264.75 594.09 sub -126.87 594.09 pgnd 10.99 594.09 in_lv 142.65 594.09 pstore 373.43 594.09 store 594.09 455.22 batt 594.09 303.42 conf 594.09 -6.9 ldo2 594.09 -152.33 ldo1 594.09 -310.59 uvp 439.39 -594.09 eoc 281.45 -594.09 batt_ok 135.88 -594.09 batt_chg -18.03 -594.09 ldo2_en -377.15 -594.09 ldo1_en -594.09 -430.77 gnd -594.09 -278.97 mpp_ref -594.09 -135.06 mpp_set -594.09 148.12 mpp -594.09 299.92
docid025569 rev 3 31/32 SPV1050 ordering information 32 8 ordering information 9 revision history table 7. device summary order code op. temp. range (c) package packing SPV1050t -40 to 85 vfqfpn 3 x 3 x 1 mm 20l tube SPV1050ttr -40 to 85 vfqfpn 3 x 3 x 1 20l tape and reel SPV1050-wst -40 to 85 wlcsp20 tes ted waffle pack or sticky foil table 8. document revision history date revision changes 25-nov-2013 1 initial release. 28-aug-2014 2 document status promoted from preliminary data to production data, with comprehensive update of electrical characteristics and graphic content throughout the document. 18-dec-2014 3 document status corrected to reflect current phase of product development.
SPV1050 32/32 docid025569 rev 3 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics ? all rights reserved

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